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CPU Error: ANAL/ERROR output -- request for interpretation of severity of it
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AEF
*nix forums Guru


Joined: 27 Jul 2005
Posts: 516

PostPosted: Thu Feb 03, 2005 3:21 pm    Post subject: Re: CPU Error: ANAL/ERROR output -- request for interpretation of severity of it Reply with quote

Another datum: I just noticed that the uptime reported here, 21 days,
is wrong. It's been up for 278 days (according to SHOW SYSTEM). I've
seen such mismatches before with longish uptimes, but with VMS v6.2!

Advice welcome. Thanks again.

Alan E. Feldman wrote:
Quote:
Can someone tell me how serious this is? Should I stop using this CPU
right away or only if more errors come up? Thanks.

******************************* ENTRY 27.
*******************************
ERROR SEQUENCE 7053. LOGGED ON:
SID
13000202
DATE/TIME 3-FEB-2005 00:06:52.32
SYS_TYPE
03260901
SYSTEM UPTIME: 21 DAYS 14:36:38
SCS NODE: NODEX VAX/VMS
V6.1

INT54 ERROR KA51 CPU Microcode Rev # 2. CONSOLE FW REV# 2.6
Standard Microcode Patch Patch Rev # 1.

REVISION 00000000
SYSTAT 00000001
ATTEMPTING RECOVERY
FLAGS 00000002
KA51 subpacket

KA51 REGISTER SUBPACKET

BPCR ECC80004
PAMODE 00000000
30 bit physical address mode
MMEPTE 8890E9B0
MMESTS 1C008004
PCSCR 01000200
Patchable control store
enabled
standard microcode patch
CPU microcode Patch Rev # = 1.
ICSR 00000001
virtual instruction cache
enabled
ECR 000000CA
full external interval timer
enabled
TBSTS 800001D0
PCCTL FFFFFC13
pcache enabled for D-stream
reference
pcache enabled for I-stream
reference
pcache parity error detection
enabled
PCSTS FFFFF820
CCTL 00000021
backup cache enabled
BCACHE TAG RAM SPEED:
read = 3 cycles, write = 3
cycles
BCACHE DATA RAM SPEED:
read = 2 cycles, write = 3
cycles
512 kilobyte backup cache
BCEDSTS 00000000
BCETSTS 00000000
MESR 800A1114
O-BIT ERROR SYNDROME = 8(X)
low bank selected
check bit in error = c3
LOST MEMORY CORRECTABLE ECC
ERROR
CORRECTABLE O-BIT ECC ERROR
ERROR SUMMARY
MMCDSR 09CBC000
2600 cycles before disown
write
tmeout
enable logging soft errors
CQBIC on CP_I02
CESR 00000000
CMCDSR 0000C108
DMA prefetching enabled
3200 Cycles Before NDAL
Timeout
144 cycles before cp1 mt
timeout
144000 cycles before cp2 mt
timeout
cp1 interrupts pending:
none
cp2 interrupts pending:
none
CEFSTS 00019200
NESTS 00000000
NEOCMD 00000F03
NEICMD 00000000
DSER 00000000
MMEADR 002AD800
VMAR 000007E0
TBADR 00000000
PCADR FFFFFFF8
BCEDIDX 00000000
BCEDECC 00000000
BCETIDX 00000000
BCETAG 00000000
MEAR 50D5AEC0
main memory error address =
0356BB00
ndal commander id = 05(X)
MOAMR 00000000

CSEAR1 00000000
CSEAR2 00000000
CIOEAR1 00004200
CIOEAR2 00000300
CNEAR 00000000
CEFADR E0000300
NEOADR 036C1E00
NEDATHI 00000000
NEDATLO 00000000
QBEAR 0000000F
DEAR 00000000
IPCR0 0020
Local Memory External Access
Enabled
******************************* ENTRY 28.
*******************************
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AEF
*nix forums Guru


Joined: 27 Jul 2005
Posts: 516

PostPosted: Thu Feb 03, 2005 3:15 pm    Post subject: CPU Error: ANAL/ERROR output -- request for interpretation of severity of it Reply with quote

Can someone tell me how serious this is? Should I stop using this CPU
right away or only if more errors come up? Thanks.

******************************* ENTRY 27.
*******************************
ERROR SEQUENCE 7053. LOGGED ON: SID
13000202
DATE/TIME 3-FEB-2005 00:06:52.32 SYS_TYPE
03260901
SYSTEM UPTIME: 21 DAYS 14:36:38
SCS NODE: NODEX VAX/VMS
V6.1

INT54 ERROR KA51 CPU Microcode Rev # 2. CONSOLE FW REV# 2.6
Standard Microcode Patch Patch Rev # 1.

REVISION 00000000
SYSTAT 00000001
ATTEMPTING RECOVERY
FLAGS 00000002
KA51 subpacket

KA51 REGISTER SUBPACKET

BPCR ECC80004
PAMODE 00000000
30 bit physical address mode
MMEPTE 8890E9B0
MMESTS 1C008004
PCSCR 01000200
Patchable control store enabled
standard microcode patch
CPU microcode Patch Rev # = 1.
ICSR 00000001
virtual instruction cache
enabled
ECR 000000CA
full external interval timer
enabled
TBSTS 800001D0
PCCTL FFFFFC13
pcache enabled for D-stream
reference
pcache enabled for I-stream
reference
pcache parity error detection
enabled
PCSTS FFFFF820
CCTL 00000021
backup cache enabled
BCACHE TAG RAM SPEED:
read = 3 cycles, write = 3
cycles
BCACHE DATA RAM SPEED:
read = 2 cycles, write = 3
cycles
512 kilobyte backup cache
BCEDSTS 00000000
BCETSTS 00000000
MESR 800A1114
O-BIT ERROR SYNDROME = 8(X)
low bank selected
check bit in error = c3
LOST MEMORY CORRECTABLE ECC
ERROR
CORRECTABLE O-BIT ECC ERROR
ERROR SUMMARY
MMCDSR 09CBC000
2600 cycles before disown write
tmeout
enable logging soft errors
CQBIC on CP_I02
CESR 00000000
CMCDSR 0000C108
DMA prefetching enabled
3200 Cycles Before NDAL Timeout
144 cycles before cp1 mt
timeout
144000 cycles before cp2 mt
timeout
cp1 interrupts pending:
none
cp2 interrupts pending:
none
CEFSTS 00019200
NESTS 00000000
NEOCMD 00000F03
NEICMD 00000000
DSER 00000000
MMEADR 002AD800
VMAR 000007E0
TBADR 00000000
PCADR FFFFFFF8
BCEDIDX 00000000
BCEDECC 00000000
BCETIDX 00000000
BCETAG 00000000
MEAR 50D5AEC0
main memory error address =
0356BB00
ndal commander id = 05(X)
MOAMR 00000000

CSEAR1 00000000
CSEAR2 00000000
CIOEAR1 00004200
CIOEAR2 00000300
CNEAR 00000000
CEFADR E0000300
NEOADR 036C1E00
NEDATHI 00000000
NEDATLO 00000000
QBEAR 0000000F
DEAR 00000000
IPCR0 0020
Local Memory External Access
Enabled
******************************* ENTRY 28.
*******************************
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