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Code to monitor cache hit rate?
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Matthew Clark
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Joined: 14 Sep 2005
Posts: 30

PostPosted: Tue Apr 25, 2006 3:33 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Ok, next phase ;-)

Anything out there that bangs on the PPC's L1/L2 cache and finds any
parity errors? (A memtest for cache?)

Matt
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Matthew Clark
*nix forums beginner


Joined: 14 Sep 2005
Posts: 30

PostPosted: Mon Apr 24, 2006 3:28 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Yes, Anton. This is exactly what I'm looking for. Thanks!

Matt
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Paul Russell
*nix forums beginner


Joined: 14 Mar 2005
Posts: 11

PostPosted: Sun Apr 23, 2006 2:38 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Anton Ertl wrote:

Quote:
"Matthew Clark" <drmcclark@gmail.com> writes:

I got the ECC data ok (the board's bridge chip tracks it somehow), but
Oprofiles appears to only act in timer mode on the PPC 74xx, no
measurable performance counters. Any other ideas?


Use the perfctr patch and associated tools, e.g., perfex.

http://user.it.uu.se/~mikpe/linux/perfctr/
http://www.complang.tuwien.ac.at/anton/linux-perfex/ppc7450.html


Thanks Anton - that looks useful.

Paul
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Anton Ertl
*nix forums addict


Joined: 20 Feb 2005
Posts: 91

PostPosted: Sun Apr 23, 2006 11:34 am    Post subject: Re: Code to monitor cache hit rate? Reply with quote
"Matthew Clark" <drmcclark@gmail.com> writes:
Quote:
I got the ECC data ok (the board's bridge chip tracks it somehow), but
Oprofiles appears to only act in timer mode on the PPC 74xx, no
measurable performance counters. Any other ideas?

Use the perfctr patch and associated tools, e.g., perfex.

http://user.it.uu.se/~mikpe/linux/perfctr/
http://www.complang.tuwien.ac.at/anton/linux-perfex/ppc7450.html

- anton
--
M. Anton Ertl Some things have to be seen to be believed
anton@mips.complang.tuwien.ac.at Most things have to be believed to be seen
http://www.complang.tuwien.ac.at/anton/home.html
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Paul Russell
*nix forums beginner


Joined: 14 Mar 2005
Posts: 11

PostPosted: Fri Apr 21, 2006 9:49 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Matthew Clark wrote:

Quote:
I got the ECC data ok (the board's bridge chip tracks it somehow), but
Oprofiles appears to only act in timer mode on the PPC 74xx, no
measurable performance counters. Any other ideas?


Ah - sorry about that - you may just have to hack a bit of code together
to read the PMCs.

Paul
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Matthew Clark
*nix forums beginner


Joined: 14 Sep 2005
Posts: 30

PostPosted: Fri Apr 21, 2006 8:24 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
I got the ECC data ok (the board's bridge chip tracks it somehow), but
Oprofiles appears to only act in timer mode on the PPC 74xx, no
measurable performance counters. Any other ideas?
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Paul Russell
*nix forums beginner


Joined: 14 Mar 2005
Posts: 11

PostPosted: Fri Apr 21, 2006 3:57 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Matthew Clark wrote:

Quote:
Paul,

I'm using the "Stress" tests from the LTP. Do you think that'll be
sufficient?


I'm not familiar with LTP so I don't know if it has any 7400-specific
code to exercise AltiVec. A good way to do this kind of thing is to run
something AltiVec-optimised like a suitable MP3 encoder or MPEG video
encoder. Let it run for an hour or two and maybe monitor the smbient and
CPU core temperatures.

Paul
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Matthew Clark
*nix forums beginner


Joined: 14 Sep 2005
Posts: 30

PostPosted: Fri Apr 21, 2006 3:41 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Paul,

I'm using the "Stress" tests from the LTP. Do you think that'll be
sufficient?

Matt
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Paul Russell
*nix forums beginner


Joined: 14 Mar 2005
Posts: 11

PostPosted: Fri Apr 21, 2006 3:17 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Matthew Clark wrote:

Quote:
Paul Russell wrote:

I /think/ oprofile will let you capture data from the PMCs so that you
can get cache hit rates and a zillion other bits of performance data.


Thanks, Paul. I'll give that a try. I don't suppose oprofile can log
ECC
corrections in memory. I'm trying to stress this board using LTP and
catch as much performance data as I can.


I'm not sure about ECC correction data - this is probably taken care of
in the memory controller but you may still be able to get at a suitable
register.

Good luck,

Paul

P.S. On the 74xx if you really want to stress the board you'll want to
keep the AltiVec units busy on the CPU - that can really drive up the
power consumption and CPU core temperature etc.
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Matthew Clark
*nix forums beginner


Joined: 14 Sep 2005
Posts: 30

PostPosted: Fri Apr 21, 2006 2:47 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Paul Russell wrote:
Quote:
I /think/ oprofile will let you capture data from the PMCs so that you
can get cache hit rates and a zillion other bits of performance data.

Thanks, Paul. I'll give that a try. I don't suppose oprofile can log
ECC
corrections in memory. I'm trying to stress this board using LTP and
catch as much performance data as I can.

Matt
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Paul Russell
*nix forums beginner


Joined: 14 Mar 2005
Posts: 11

PostPosted: Fri Apr 21, 2006 1:54 pm    Post subject: Re: Code to monitor cache hit rate? Reply with quote
Matthew Clark wrote:

Quote:
Is there any linux code to monitor the L1 and L2 cache hit rates for
the PPC 750 and 74xx? I would think so, but my google searches aren't
turning up anything.


I /think/ oprofile will let you capture data from the PMCs so that you
can get cache hit rates and a zillion other bits of performance data.

Paul
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Matthew Clark
*nix forums beginner


Joined: 14 Sep 2005
Posts: 30

PostPosted: Fri Apr 21, 2006 1:36 pm    Post subject: Code to monitor cache hit rate? Reply with quote
Is there any linux code to monitor the L1 and L2 cache hit rates for
the PPC 750 and 74xx? I would think so, but my google searches aren't
turning up anything.

Thanks,

Matt
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Google
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